View SC4605IMSTR_4123813.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Low Input, High Efficiency Synchronous, Step Down Controller
POWER MANAGEMENT Description
The SC4605 is a voltage mode step down (buck) regulator controller that provides accurate high efficiency power conversion from a input supply range of 2.8V to 5.5V. A high level of integration reduces external component count, and makes it suitable for low voltage applications where cost, size and efficiency are critical. The SC4605 drives external N-channel MOSFETs with 1A peak current. A non-overlap protection is provided for the gate drive signals to prevent shoot through of the MOSFET pair. The voltage drop across the high side MOSFET during its conduction is sensed for lossless short circuit current limiting. The quiescent supply current in sleep mode is typically lower than 10A. A 1.8ms soft start is internally provided to prevent output voltage overshoot during start-up. The SC4605 is an ideal choice for 3.3V, 5V or other low input supply systems. It's available in 10 pin MSOP package.
SC4605
Features
BICMOS voltage mode PWM controller 2.8V to 5.5V Input voltage range Output voltages as low as 0.8V +/-1% Reference accuracy Sleep mode (Icc = 10A typ) Lossless adjustable short circuit current limiting Combination pulse by pulse & hiccup mode current limit High efficiency synchronous switching 0% to 97% Duty cycle range 1A Peak current driver 10-Pin MSOP package
Applications
Distributed power architecture Servers/workstations Local microprocessor core power supplies DSP and I/O power supplies Battery powered applications Telecommunications equipment Data processing applications
Typical Application Circuit
Vin = 2.8V - 5.5V
D2 C14 0.1u C3 4.7u R13 1 1 2 3 4 C1 180p R1 14.3k C2 2.2n C20 470pF 5 1u C71 M1 U1 BST VCC ISET COMP DRVH PHASE DRVL GND VSENSE 10 9 8 7 6 M2 1.8u C6 330u C5 22u C4 22u L1 C10 220u C11 22u C12 22u
R3
Vout = 1.5V (as low as 0.8V * ) / 12A
FS/SYNC FSET
C9 4.7n R8 200
R7 10k
SC4605
R9 11.5k
* External components can be modified to provide a Vout as low as 0.8V.
Revision: October 14, 2004
1
www.semtech.com
SC4605
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Supply Voltage (VCC) Output Drivers (DRVH, DRVL) Currents Continuous P eak Inputs (VSENSE, COMP, FS/SYNC, ISET) PHASE PHASE Pulse tpulse < 100ns Operating Ambient Temperature Range Storage Temperature Range Junction Temperature Range Lead Temperature (Soldering) 10 Sec.
Symbol
Maximum 7 +/-0.25 +/-1.00 -0.3 to 7 -0.3 to 5.5 -2 to 7
Units V A A V V V C C C C
TA TSTG TJ TLEAD
-40 to +85 -65 to +150 -55 to +150 +300
All voltages with respect to GND. Currents are positive into, negative out of the specified terminal.
Electrical Characteristics
Unless otherwise specified, VCC = 5V, CT = 470pF, TA = -40C to 85C, TA = TJ.
Parameter Overall Supply Voltage Supply Current, Sleep Supply Current, Bias VCC Turn-on Threshold VCC Turn-off Hysteresis Error Amplifier Input Voltage (Internal Reference)
Test Conditions
Min
Typ
Max
Unit
2.8 FS/SYNC = 0V VCC = 5.5V 10 1 2.7 125
5.5 15 3 2.8
V A mA V mV
TA = 25C VCC = 2.8V ~ 5.5V, TA = 25C Temperature
0.792 0.788 0.786
0.8 0.8 0.8 25
0.808 0.812 0.814 nA dB MHz V/s V 0.25 V
www.semtech.com
V
VSENSE Bias Current Open Loop Gain (1) Unity Gain Bandwidth (1) Slew Rate
(1)
VCOMP = 0.5 to 2.5V
80 4 2
VOUT High VOUT Low
2004 Semtech Corp.
ICOMP = -2mA ICOMP = 2mA
2
VCC - 0.5
VCC - 0.2 0.1
SC4605
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless otherwise specified, VCC = 5V, CT = 470pF, TA = -40C to 85C, TA = TJ.
Parameter Oscillator Initial Accuracy Minimum Operation Frequency (1) Maximum Operation Frequency (1) Ramp Peak to Valley (1) Ramp Peak Voltage Ramp Valley Voltage
(1) (1)
Test Conditions
Min
Typ
Max
Unit
TA = 25C
255
300 100 600 1.5 2.0 0.5
345
kHz kHz kHz V V V
Sleep, Soft Start, Current Limit Sleep Threshold Soft Start Time
(1)
Measured at FS 1.8 TJ = 25C
(1)
0.2
V ms
ISET Bias Current Current Limit Blank Time Gate Drive Duty Cycle Peak Source (DRVH) (2) Peak Sink (DRVH) (2) Peak Source (DRVL) (2) Peak Sink (DRVL) (2) Output Rise Time Output Fall Time
(2)
-43
-50 150
-57
A ns
0 Vgs = 5V, ISOURCE = 100mA Vgs = 5V, ISINK = 100mA Vgs = 5V, ISOURCE = 100mA Vgs = 5V, ISINK = 100mA Vgs = 5V, COUT = 4.7nF Vgs = 5V, COUT = 4.7nF
(1)
97 3 3 3 3 35 35
% ns ns ns
(2)
Minimum Non-Overlap
30
40
Notes: (1). Guaranteed by design. (2). Guaranteed by characterization. (3) This device is ESD sensitive. Use of standard ESD handling precautions is required.
2004 Semtech Corp.
3
www.semtech.com
SC4605
POWER MANAGEMENT Pin Configuration
TOP VIEW
BST VCC ISET COMP FS/SYNC 1 2 3 4 5 10 9 8 7 6 DRVH PHASE DRVL GND VSENSE
Ordering Information
Part Number (1) SC4605IMSTR SC4605IMSTRT (2) Device MSOP-10
Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant.
(MSOP-10)
Pin Descriptions
VCC: Positive supply rail for the IC. Bypass this pin to GND with a 0.1 to 4.7F low ESL/ESR ceramic capacitor. GND: All voltages are measured with respect to this pin. All bypass and timing capacitors connected to GND should have leads as short and direct as possible. FS/SYNC: A capacitor from FS pin to GND sets the PWM oscillator frequency. Use a high quality ceramic capacitor with low ESL and ESR for best result. A minimum capacitor value of 200pF ensures good accuracy and less susceptibility to circuit layout parasitics. When the FS is pulled and held below 0.2V, its sleep mode operation is invoked. The Sleepmode supply current is 10A typical. The oscillator and PWM are designed to provide practical operation up to 600kHz. In synchronous mode operation, a low value resistor has to be connected between ground and the timing capacitor. An external clock is then feed into the resistor capacitor junction to override the internal clock. VSENSE: This pin is the inverting input of the voltage amplifier and serves as the output voltage feedback point for the Buck converter. It senses the output voltage through an external divider. COMP: This is the output of the voltage amplifier. The voltage at this output is inverted internally and connected to the non-inverting input of the PWM comparator. A leadlag network around the voltage amplifier compensates for the two pole LC filter characteristic inherent to voltage mode control and is required in order to optimize the dynamic performance of the voltage mode control loop.
2004 Semtech Corp. 4 www.semtech.com
ISET / PHASE: PHASE is connected to the junction between the two external power MOSFET transistors. The voltage drop across the high side MOSFET during its conduction is compared with the voltage drop generated by the internal 50A current source and the external current limit resistor connected between PHASE and Vin, and forms the current limit comparator and logic sets the PWM latch and terminates the output pulse. If the converter output voltage drops below 68.75% of its nominal voltage, the controller stops switching and goes through a soft start sequence. This prevents excess power dissipation in the low side MOSFET during a short circuit. The current limit threshold is set by the external resistor between VCC and ISET. BST: This pin connects the external charge pump, and powers the high side MOSFET gate drive. DRVH, DRVL: The output drivers are rated for 1A peak currents. The PWM circuitry provides complementary drive signals to the output stages. The cross conduction of the external MOSFETs is prevented by monitoring the voltage on the driver pins of the MOSFET pair in conjunction with a time delay optimized for FET turn-off characteristics.
SC4605
POWER MANAGEMENT Block Diagram
Marking Information
yyww = Datecode (Example: 0012) xxxx = Semtech Lot # (Example: E901 xxxx 01-1)
2004 Semtech Corp.
5
www.semtech.com
SC4605
POWER MANAGEMENT Applications Information
Enable Pulling and holding the FS/SYNC pin below 0.2V initializes the SLEEP mode of the SC4605 with its typical SLEEP mode supply current of 10A. During the SLEEP mode, the high side and low side MOSFETs are turned off and the internal soft start voltage is held low. Oscillator The oscillator uses an external capacitor between FS and GND to set the oscillation frequency. The ramp waveform is a triangle at the PWM frequency with a peak voltage of 2V and a valley voltage of 0.5V. The PWM duty ratio is limited to a maximum of 97%, which allows the bootstrap capacitor to be charged during each cycle. The capacitor tolerance adds to the accuracy of the oscillator frequency. The approximate operating frequency is determined by the external capacitor connected to the FS/SYNC pin as shown below:
fs = 1.55 10 -4 CT
Soft Start The soft start function is required for step down controllers to prevent excess inrush current through the DC bus during start up. Generally this can be done by sourcing a controlled current into a timing capacitor and then using the voltage across this capacitor to slowly ramp up the error amp reference. The closed loop creates narrow width driver pulses while the output voltage is low and allows these pulses to increase to their steady state duty cycle as the output voltage reaches its regulated value. With this, the inrush current from the input side is controlled. The duration of the soft start in the SC4605 is controlled by an internal timing circuit which is used during start up and over current to set the hiccup time. The soft start time can be calculated by:
TSOFT _ START = 720 fs
As can be seen here, the soft start time is switching frequency dependant. For example, if fs = 300kHz, TSOFT_START = 720/300k = 2.4ms. But if fs = 600kHz, TSOFT_START = 720/600k = 1.2ms. The SC4605 implements its soft start by ramping up the error amplifier reference voltage providing a controlled slew rate of the output voltage, then preventing overshoot and limiting inrush current during its start up. Over Current Protection Over current protection for the SC4605 is implemented by detecting the voltage drop of the high side N-MOSFET during its conduction, also known as high side RDS(ON) detection. This loss-less detection eliminates the sense resistor and its loss. The overall efficiency is improved and the number of components and cost of the converter are reduced. RDS(ON) sensing is by default inaccurate and is mainly used to protect the power supply during a fault case. The over current trigger point will vary from unit to unit as the RDS(ON) of N-MOSFET varies. Even for the same unit, the over current trigger point will vary as the junction temperature of N-MOSFET varies. The SC4605 provides a built-in 50A current source, which is combined with RSET (connected between VCC and ISET) to determine the current limit threshold. The value of RSET can be properly selected according to the desired current limit point IMAX and the internal 50A pull down current available on the ISET pin based on the following expression:
6 www.semtech.com
In its synchronous mode, a low value resistor needs to be connected between ground and the frequency setting capacitor, CT. Then an external clock connects to the junction of the resistor and the capacitor to activate its synchronous mode. The frequency of the clock can be used up to 700kHz. This external clock signal should have a duty cycle from 5% to 10% and the peak voltage at the junction from the clock signal should be about 0.2V. UVLO When the FS/SYNC pin is not pulled and held below 0.2V, the voltage on the Vcc pin determines the operation of the SC4605. As Vcc increases during start up, the UVLO block senses Vcc and keeps the high side and low side MOSFETs off and the internal soft start voltage low until Vcc reaches 2.8V. If no faults are present, the SC4605 will initiate a soft start when Vcc exceeds 2.8V. A hysteresis (150mV) in the UVLO comparator provides noise immunity during its start up.
2004 Semtech Corp.
SC4605
POWER MANAGEMENT Applications Information (Cont.)
R SET = IMAX R DS( ON) 50A
Power MOSFET Drivers The SC4605 has two drivers for external power NMOSFETs. The driver block consists of one high side NMOSFET, 1A driver, DRVH, and one low side 1A, N-MOSFET driver, DRVL, which are optimized for driving external power MOSFETs in a synchronous buck converter. The output drivers also have gate drive non-overlap mechanism that gives a dead time between DRVH and DRVL transitions to avoid potential shoot through problems in the external MOSFETs. By using the proper design and the appropriate MOSFETs, a 12A converter can be achieved. As shown in Figure 2, td1, the delay from the top MOSFET off to the bottom MOSFET on is adaptive by detecting the voltage of the phase node. td2, the delay from the bottom MOSFET off to the top MOSFET on is fixed, is 50ns for the SC4605. This control scheme guarantees avoiding the cross conduction or shoot through between two MOSFETs and minimizes the conduction loss in the bottom diode for high efficiency applications.
Kelvin sensing connections should be used at the drain and source of N-MOSFET. R needs to be adjusted if SET the input of the application changes significantly, say from 3.3V to 5V for the same load and same output voltage. A 0.1A ceramic capacitor paralled to this resistor should be used to decouple the noise. The RDS(ON) sensing used in the SC4605 has an additional feature that enhances the performance of the over current protection. Because the RDS(ON) has a positive temperature coefficient, the 50A current source has a positive coefficient of about 0.17%/C providing first order correction for current sensing vs temperature. This compensation depends on the high amount of thermal transferring that typically exists between the high side NMOSFET and the SC4605 due to the compact layout of the power supply. When the converter detects an over current condition (I > IMAX) as shown in Figure 1, the first action the SC4605 takes is to enter the cycle by cycle protection mode (Point B to Point C), which responds to minor over current cases. Then the output voltage is monitored. If the over current and low output voltage (set at 68.75% of nominal output voltage) occur at the same time, the Hiccup mode operation (Point C to Point D) of the SC4605 is invoked and the internal soft start capacitor is discharged. This is like a typical soft start cycle.
TOP MOSFET Gate Drive BOTTOM MOSFET Gate Drive
Phase node
Ground
td1
td2
Figure 2. Timing Waveforms for Gate Drives and Phase Node Inductor Selection
A
VO - nom
B
0.6875 VO - nom
C D
VO
0.125 VO - nom
IMAX
IO
Figure 1. Over current protection characteristic of SC4605
2004 Semtech Corp. 7
The factors for selecting the inductor include its cost, efficiency, size and EMI. For a typical SC4605 application, the inductor selection is mainly based on its value, saturation current and DC resistance. Increasing the inductor value will decrease the ripple level of the output voltage while the output transient response will be degraded. Low value inductors offer small size and fast transient responses while they cause large ripple currents, poor efficiencies and more output capacitance to smooth out the large ripple currents. The inductor should be able to handle the peak current without saturating and its copper resistance in the winding should be as low as possible to minimize its resistive power loss. A good tradeoff among its size, loss and cost is to set the inductor ripple current to be within 15% to 30% of the maximum output current.
www.semtech.com
SC4605
POWER MANAGEMENT Applications Information (Cont.)
The inductor value can be determined according to its operating point and the switching frequency as follows:
L= VO ( VI - VO ) VI fs I IOMAX
Where: fs = switching frequency and DI = ratio of the peak to peak inductor current to the maximum output load current. The peak to peak inductor current is:
IP -P = I * IOMAX
the additional current needed by the load. The ESR and ESL of the output capacitor, the loop parasitic inductance between the output capacitor and the load combined with inductor ripple current are all major contributors to the output voltage ripple. Surface mount speciality polymer aluminum electrolytic chip capacitors in UE series from Panasonic provide low ESR and reduce the total capacitance required for a fast transient response. POSCAP from Sanyo is a solid electrolytic chip capacitor that has a low ESR and good performance for high frequency with a low profile and high capacitance. Above mentioned capacitors are recommended to use in SC4605 applications. Boost Capacitor Selection The boost capacitor selection is based on its discharge ripple voltage, worst case condition time and boost current. The worst case conduction time T can be estimated W as follows:
Tw = 1 Dmax fs
After the required inductor value is selected, the proper selection of the core material is based on the peak inductor current and efficiency requirements. The core must be able to handle the peak inductor current IPEAK without saturation and produce low core loss during the high frequency operation.
IPEAK = IOMAX + Ip -p 2
The power loss for the inductor includes its core loss and copper loss. If possible, the winding resistance should be minimized to reduce inductor's copper loss. The core loss can be found in the manufacturer's datasheet. The inductor' copper loss can be estimated as follows:
PCOPPER = I2LRMS R WINDING
Where: f = the switching frequency and S Dmax = maximum duty ratio, 0.97 for the SC4605. The required minimum capacitance for boost capacitor will be:
Cboost = IB TW VD
Where: ILRMS is the RMS current in the inductor. This current can be calculated as follows:
ILRMS 1 = IOMAX 1 + I2 3
Where: I = the boost current and B V = discharge ripple voltage
D
With f = 300kH, V = 0.3V and I = 50mA, the required S D B capacitance for the boost capacitor is:
Cboost = IB 1 0.05 1 Dmax = 0.97 = 540nF VD fs 0.3 300k
Output Capacitor Selection Basically there are two major factors to consider in selecting the type and quantity of the output capacitors. The first one is the required ESR (Equivalent Series Resistance) which should be low enough to reduce the voltage deviation from its nominal one during its load changes. The second one is the required capacitance, which should be high enough to hold up the output voltage. Before the SC4605 regulates the inductor current to a new value during a load transient, the output capacitor delivers all
2004 Semtech Corp. 8
Input Capacitor Selection The input capacitor selection is based on its ripple current level, required capacitance and voltage rating. This capacitor must be able to provide the ripple current by the switching actions. For the continuous conduction
www.semtech.com
SC4605
POWER MANAGEMENT Applications Information (Cont.)
mode, the RMS value of the input capacitor can be calculated from:
ICIN (RMS ) = IOMAX VO ( VI - VO ) V 2I PTOP _ TOTAL = I2 TOP _ RMS R TOP _ ON +
ITOP _ PEAK VI fs VGATE RG
(Q GD + Q GS 2 ) + Q GT VGATE fs + (Q OSS + Q rr ) VI fs
This current gives the capacitor's power loss as follows:
PCIN = I2 CIN(RMS ) R CIN(ESR )
This capacitor's RMS loss can be a significant part of the total loss in the converter and reduce the overall converter efficiency. The input ripple voltage mainly depends on the input capacitor's ESR and its capacitance for a given load, input voltage and output voltage. Assuming that the input current of the converter is constant, the required input capacitance for a given voltage ripple can be calculated by:
CIN = IOMAX D (1 - D) fs ( VI - IOMAX R CIN(ESR ) )
Where: RG = gate drive resistor, QGD = the gate to drain charge of the top MOSFET, QGS2 = the gate to source charge of the top MOSFET, QGT = the total gate charge of the top MOSFET, QOSS = the output charge of the top MOSFET and Qrr = the reverse recovery charge of the bottom diode. For the top MOSFET, it experiences high current and high voltage overlap during each on/off transition. But for the bottom MOSFET, its switching voltage is the bottom diode's forward drop during its on/off transition. So the switching loss for the bottom MOSFET is negligible. Its total power loss can be determined by:
PBOT _ TOTAL = I2 BOT _ RMS R BOT _ ON + Q GB VGATE fs + ID _ AVG VF
Where: D = VO/VI , duty ratio and DVI = the given input voltage ripple. Because the input capacitor is exposed to the large surge current, attention is needed for the input capacitor. If tantalum capacitors are used at the input side of the converter, one needs to ensure that the RMS and surge ratings are not exceeded. For generic tantalum capacitors, it is wise to derate their voltage ratings at a ratio of 2 to protect these input capacitors. Power Mosfet Selection The SC4605 can drive an N-MOSFET at the high side and an N-MOSFET synchronous rectifier at the low side. The use of the high side N-MOSFET will significantly reduce its conduction loss for high current. For the top MOSFET, its total power loss includes its conduction loss, switching loss, gate charge loss, output capacitance loss and the loss related to the reverse recovery of the bottom diode, shown as follows:
Where: QGB = the total gate charge of the bottom MOSFET and VF = the forward voltage drop of the bottom diode. For a low voltage and high output current application such as the 3.3V/1.5V@12A case, the conduction loss is often dominant and selecting low RDS(ON) MOSFETs will noticeably improve the efficiency of the converter even though they give higher switching losses. The gate charge loss portion of the top/bottom MOSFET's total power loss is derived from the SC4605. This gate charge loss is based on certain operating conditions (fs, VGATE, and IO). The thermal estimations have to be done for both MOSFETs to make sure that their junction temperatures do not exceed their thermal ratings according to their total power losses PTOTAL, ambient temperature Ta and their thermal resistance Rja as follows:
Tj(max) < Ta + PTOTAL R ja
2004 Semtech Corp.
9
www.semtech.com
SC4605
POWER MANAGEMENT Applications Information (Cont.)
Loop Compensation Design For a DC/DC converter, it is usually required that the converter has a loop gain of a high cross-over frequency for fast load response, high DC and low frequency gain for low steady state error, and enough phase margin for its operating stability. Often one can not have all these properties at the same time. The purpose of the loop compensation is to arrange the poles and zeros of the compensation network to meet the requirements for a specific application. The SC4605 has an internal error amplifier and requires the compensation network to connect among the COMP pin and VSENSE pin, GND, and the output as shown in Figure 3. The compensation network includes C1, C2, R1, R7, R8 and C9. R9 is used to program the output voltage according to:
VO = 0.8 (1 + R7 ) R9
Where: R = load resistance and RC = C4's ESR. The compensation network will have the characteristic as follows:
s s 1+ Z1 Z 2 GCOMP (s) = I s s s 1+ 1+ P1 P 2 1+
Where;
I = 1 R 7 ( C1 + C 2 ) 1 R1 C 2
Z1 = Z 2 =
1 (R 7 + R 8 ) C 9 C1 + C 2 R 1 C1 C 2 1 R 8 C9
SC4605
1 2 3 4 C1 C2 5 BST VCC ISET COMP FSET DRVH PHASE DRVL GND VSENSE 10 9 8 7 6 C4 C9 L1 +VO
P1 =
R7 R1 R8
P 2 =
After the compensation, the converter will have the following loop gain:
R9
T(s) = GPWM GCOMP (s) G VD (s) =
Figure 3. Compensation network provides 3 poles and 2 zeros. For voltage mode step down applications as shown in Figure 3, the power stage transfer function is:
s 1 RC C4
s 1 s s 1 I VI 1 + 1+ RC C4 Z1 Z 2 VM s s L s 1+ 1+ 1 + s + s 2LC P1 P 2 R 1+
Where: GPWM = PWM gain VM = 1.5V, ramp peak to valley voltage of SC4605
1+ G VD (s) = VI
1+ s
L1 + s 2L 1C 4 R
10 www.semtech.com
2004 Semtech Corp.
SC4605
POWER MANAGEMENT Applications Information (Cont.)
The design guidelines for the SC4605 applications are as following: 1. Set the loop gain crossover corner frequency C for given switching corner frequency S =2fs, 2. Place an integrator at the origin to increase DC and low frequency gains, 3. Select Z1 and Z2 such that they are placed near O to damp the peaking and the loop gain has a -20dB/dec rate to go across the 0dB line for obtaining a wide bandwidth, 4. Cancel the zero from C4's ESR by a compensator pole P1 ( P1 = ESR = 1/( RCC4)), 5. Place a high frequency compensator pole p2 ( p2 = fs) to get the maximum attenuation of the switching ripple and high frequency noise with the adequate phase lag at C. Layout Guideline In order to achieve optimal electrical, thermal and noise performance for high frequency converters, special attention must be paid to the PCB layouts. The goal of layout optimization is to identify the high di/dt loops and minimize them. The following guideline should be used to ensure proper functions of the converters. 1. A ground plane is recommended to minimize noises and copper losses, and maximize heat dissipation. 2. Start the PCB layout by placing the power components first. Arrange the power circuit to achieve a clean power flow route. Put all the connections on one side of the PCB with wide copper filled areas if possible. 3. The Vcc bypass capacitor should be placed next to the Vcc and GND pins. 4. The trace connecting the feedback resistors to the output should be short, direct and far away from the noise sources such as switching node and switching components. 5. Minimize the traces between DRVH/DRVL and the gates of the MOSFETs to reduce their impedance to drive the MOSFETs. 6. Minimize the loop including input capacitors, top/bottom MOSFETs. This loop passes high di/dt current. Make sure the trace width is wide enough to reduce copper losses in this loop. 7. ISET and PHASE connections to the top MOSFET for current sensing must use Kelvin connections. 8. Maximize the trace width of the loop connecting the inductor, bottom MOSFET and the output capacitors. 9. Connect the ground of the feedback divider and the compensation components directly to the GND pin of the SC4605 by using a separate ground trace. Then connect this pin to the ground of the output capacitor as close as possible.
The compensated loop gain will be as given in Figure 4:
T Z1 o Z2 Gvd 0dB c p1 p2 Power stage GVD(s) ESR -40dB/dec Loop gain T(s) -20dB/dec
Figure 4. Asymptotic diagrams of power stage and its loop gain
2004 Semtech Corp.
11
www.semtech.com
SC4605
POWER MANAGEMENT Applications Information (Cont.)
Design Example 1: 3.3V to 1.5V @ 12A application with SC4605 (NH020 footprint)
GND
1 2 3
+VIN D2 R13 1 1 C3 4.7u 2 3 4 C1 180p R1 14.3k C2 2.2n R12 100 C20 470pF 5 C10 1u C71 R6 U1 BST VCC ISET COMP FSET DRVH PHASE DRVL GND VSENSE 10 9 8 7 6 R5 1.0 M2 1.0 L1 M1 330u C12 22u ON/OFF
4 5 6 J1 1 2 3 4 5 J2
R3 2.26k
C14 0.1u
+VOUT 1.8u C7 150u C6 150u C5 22u C4 22u
C9 4.7n R8 200
R7 10k
SC4605
R10 100 R11 100 R9 11.5k
TRIM
ON/OFF
Figure 5. Schematic for 3.3V/1.5V@12A with SC4605 application
Design Example 2: 5V to 1.5V @ 12A application with SC4605 (NH020 footprint)
GND 1 2 3 +VIN D2 R13 1 1 C3 4.7u 2 3 4 C1 180p R1 14.3k C2 2.2n R12 100 C20 470pF 5 C10 1u C71 R6 U1 BST VCC ISET COMP FSET DRVH PHASE DRVL GND VSENSE 10 9 8 7 6 R5 1.0 M2 1.0 L1 1.8u C7 150u C6 150u C5 22u C4 22u +VOUT 1 2 3 4 5 J2 M1 330u C12 22u ON/OFF 4 5 6 J1
R3 2.8k
C14 0.1u
C9 4.7n R8 200
R7 10k
SC4605
R10 100
TRIM
R11 100
R9 11.5k
ON/OFF
Figure 6. Schematic for 5V/1.5V@12A with SC4605 application
2004 Semtech Corp. 12 www.semtech.com
SC4605
POWER MANAGEMENT Applications Information (Cont.)
Design Example 3: 3.3V to 1.5V @ 15A application with SC4605 and its typical efficiency characteristics.
U3
V i 3. n= 3V
C10 D2 330u 1u C17 C11 330u C12 22u C13 22u C14 22u
1 2 3 4
Vin Vin GND GND J8
Vin Vin GND GND
8 7 6 5
R3 2.43k
C18 0.1u
R13 1 U1 1 C3 4.7u 2 3 4 BST VCC ISET COMP FSET DRVH PHASE DRVL GND VSENSE 10 9 8 7 6
M11
M12
R6 1 R5 1 M21 M22
H C 2-2R 2
V o ut= 1. 15 A 5V
2.2u P C7 470u C5 22u C4 22u C9 8.2n R8 115 R7 5.62k 1 2 3 4 5 6
U2 Vout Vout Vout GND GND GND J12 Vout Vout Vout GND GND GND 12 11 10 9 8 7
270p R1 15.8k
470pF
S C 4605
4 x S i 82 78
N
C1
C2
2.2n
C16
5
R9 6.49k
Figure 7. Schematic for 3.3V/1.5V @ 15A with SC4605 application
Efficiency vs Load current
0.93
0.92
Efficiency
0.91 Vin=3.3V 0.9
0.89
Vo=1.5V
0.88 3 6 9
Load current (A)
12
15
2004 Semtech Corp.
13
www.semtech.com
SC4605
POWER MANAGEMENT Applications Information (Cont.)
Design Example 4: 5V to 3.3V @ 5A application with SC4605 and its typical efficiency characteristics.
GND 1 2 3
2 x S i7882
D2 C14 0.1u C3 4.7u R13 1 1 2 3 4 C1 220p R1 14.3k C2 2.2n R12 100 C20 470pF 5 C10 1u C71 R6 U1 BST VCC ISET COMP FSET DRVH PHASE DRVL GND VSENSE 10 9 8 7 6 R5 1.0 M2 1.0 22u M1 C12 22u
V I =5V N
4 5 ON/OFF 6 J1
R3 2.87k
E T Q P 6F 2R 5
2.5u C7 150u C6 150u C5 22u C4
V O U T=3. V / A 35
C9 10n R8 97.6 R10 100 R7 4.7k
1 2 3 4 5 J2
22u
S C 4605
TRIM
R11 100
R9 1.5k
ON/OFF
Figure 8. Schematic for 5V/3.3V@ 5A with SC4605 application
Efficiency vs Load current
0.98 0.97 0.96
Efficiency
0.95 0.94 0.93 0.92 0.91
Vo=3.3V
Vin=5V
0.9 1 2 3
Load current (A)
4
5
2004 Semtech Corp.
14
www.semtech.com
SC4605
POWER MANAGEMENT Bill of Materials - 3.3V to 1.5V @ 12A
Item 1 2 3 4 5 6 7 8 9 10 11 14 15 16 17 18 19 20 21 22 23 24 Qty 1 1 1 1 3 2 1 1 1 1 1 1 2 1 1 2 1 1 1 3 1 1 C1 C2 C3 C 71 C 4, C 5, C 12 C 6, C 7 C9 C 10 C 14 C 20 D2 L1 M1, M2 R1 R3 R5, R6 R7 R8 R9 R10, R11, R12 R13 U1 Reference 180pF 2.2nF 4.7uF, 0805 1uF 22uF, 1210 150uF, 2870 4.7nF 330uF, 2870 0.1uF 470pF MBR0520LT1, SOD-123 Inductor, 1.8uF Powerpack, SO-8 14.3k 2.32k 1.0 10k 200 11.5k 100 1 S C 4605 Semtech P/N: SC4605IMSTR ON Semiconductor Panasonic. P/N: ETQP6F1R8BFR Vishay P/N: Si7858DP Sanyo P/N: 6TPB330ML TDK P/N: C3225X5R0J226M Sanyo P/N: 4TPB150ML Value Part No./Manufacturer
Unless specified, all resistors have 1% precision with 0603 package. Capacitors will have 20% percision with 0603 package. For R9, there are 3 kinds of values for different output cases.
2004 Semtech Corp.
15
www.semtech.com
SC4605
POWER MANAGEMENT PCB Layout - 3.3V to 1.5V @ 12A
Top
Bottom
Top
Bottom
2004 Semtech Corp.
16
www.semtech.com
SC4605
POWER MANAGEMENT Applications Information (Cont.)
Over current protection characteristic of SC4605 for 3.3V to 1.5V @12A application The over current protection curve below is obtained by applying a gradually increased load while the load current and the output voltage are monitored and measured. When the load current is increased from 0 to 16.2A (over current trigger point), the output voltage is 1.5V, corresponding from Point A to Point B. As the load current increases further from 16.2A to 16.3A, the output voltage drops significantly from 1.5V (Point B) to 0.88V (Point C). Because an over current and a lower output voltage (0.88V<68.75%*1.5V=1.03V) are present at Point C, the SC4605 enters its HICCUP mode. Then the locus of the output current and the output voltage follows Line CD as shown in the curve. Due to the over current applied, the HICCUP protection will go back and forth on Line CD. This prevents excess power dissipation in the TOP MOSFET during a short output condition.
Over current protection
3 2.5 2
Vo (V)
A
B
1.5 1 0.5 0 0 5 10
Io (A)
D C
15 20
2004 Semtech Corp.
17
www.semtech.com
SC4605
POWER MANAGEMENT Typical Characteristics
Oscillator Internal Accuracy vs Input Voltage
318 316 314 312 310 308 306 304 2.5 314 312 310 308 306 304 302 300 298 -40
Internal Accuracy (kHz) Internal Accuracy (kHz)
Vcc = 5V
Oscillator Internal Accuracy vs Temperature
TA = 25C
3
3.5
4
Vcc (V)
4.5
5
5.5
-20
0
20
40
60
80
100
120
Temperature (C)
Sense Voltage vs Input Voltage
0.804 0.803 0.803 0.802 0.802 0.801 2.5 3 3.5 4
Vcc (V)
TA = 25C
Sense Voltage vs Temperature
0.804
Sense Voltage (V)
Vcc = 5V
Sense Voltage (V)
0.802 0.800 0.798 0.796 0.794 0.792
4.5
5
5.5
-40
-20
0
20
40
60
80
100
120
Temperature (C)
Current Limit Bias Current vs Input Voltage
51.0 50.5 50.0 49.5 49.0 48.5 48.0 47.5
TA = 25C
Current Limit Bias Current vs Temperature
60.0
Current Limit Bias Current (uA)
Vcc = 5V
Current Limit Bias Current (uA)
55.0 50.0 45.0 40.0 35.0 30.0
2.5
3
3.5
4
Vcc (V)
4.5
5
5.5
-40
-20
0
20
40
60
80
100
120
Temperature (C)
2004 Semtech Corp.
18
www.semtech.com
SC4605
POWER MANAGEMENT Outline Drawing - MSOP-10
e A N 2X E/2 PIN 1 INDICATOR ccc C 2X N/2 TIPS 12 B E1 E D
DIM
A A1 A2 b c D E1 E e L L1 N 01 aaa bbb ccc
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.043 .000 .006 .030 .037 .007 .011 .003 .009 .114 .118 .122 .114 .118 .122 .193 BSC .020 BSC .016 .024 .032 (.037) 10 0 8 .004 .003 .010 1.10 0.00 0.15 0.95 0.75 0.17 0.27 0.08 0.23 2.90 3.00 3.10 2.90 3.00 3.10 4.90 BSC 0.50 BSC 0.40 0.60 0.80 (.95) 10 0 8 0.10 0.08 0.25
D aaa C SEATING PLANE A2 C A1 bxN bbb C A-B D A GAGE PLANE 0.25 (L1) DETAIL SIDE VIEW
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-187, VARIATION BA.
H c
L
01
A
SEE DETAIL
A
Land Pattern - MSOP-10
X
DIM
(C) G Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.161) .098 .020 .011 .063 .224 (4.10) 2.50 0.50 0.30 1.60 5.70
Y P
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 2OO Flynn Road, Camarillo, CA. 93012 Phone: (805)498-2111 FAX (805)498-3804
2004 Semtech Corp.
19
www.semtech.com

▲Up To Search▲

Price & Availability of SC4605IMSTR

	To Download SC4605IMSTR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .